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On April 10, 1912, the ship RMS Titanic left port from Southampton to begin her maiden and final voyage to New York City. Four days into the journey, she struck an iceberg, causing massive damage to her starboard side. After two hours, early in the morning of April 15, she finally took with her more than 1,500 of the estimated 2,224 passengers and crew. It was the worst maritime disaster in history for that time.
After this disaster, many questions arose about how such a terrible thing could happen. The numerous hearings afterward brought to light some interesting reasons for the tragedy. One of those was the fascinating fact that the RMS Titanic's fate was sealed days before the grand ship even left port. A theory existed that the entire disaster could have been avoided by a relatively small and insignificant object—a little brass key. You see, a few days before Titanic would leave Southampton, the Second Officer David Blair was removed from the Titanic and reassigned to her sister ship, the RMS Olympic. In his hasty departure, he walked away with a key for the Titanic's crow's nest still in his pocket.
Unfortunately, this resulted in the crew not having access to the badly needed crow’s nest and, more importantly, the binoculars there. If used, these would have given the required early warning to steer away from the oncoming iceberg.
The reason I shared that is sometimes the smallest objects have the most significant impact on the outcome. It's called the “butterfly effect” and is a part of chaos theory. Defined as "the phenomenon whereby a minute localized change in a complex system can have large effects elsewhere." You’ve likely heard the quote, "A butterfly flaps its wings in the Amazonian jungle, and subsequently a storm ravages half of Europe."
As PCB designers, we work under the simple rule of cause and effect, and a PCB design can quickly become a petri dish for the butterfly effect to flourish. One of those areas that can quickly snowball into major problems is your PCB power distribution structure. When it goes wrong, it usually goes very wrong and has significant issues throughout your design. Because depending on your integrated circuits' sensitivity levels to changes in the source power, their performance can depreciate rather quickly.
I want to focus specifically on the use of bypass capacitors. Most integrated circuits do not perform very well in a chaotic environment known as "bad or dirty power." Just a slight change in the supply power can ripple (no pun intended) throughout your design.
The Dual-Pronged Approach
Like the brass key in the pocket of Second Officer David Blair, bypass capacitors are how you can handle power problems and protect your sensitive IC's. Keep in mind, you must handle separately the low and high-frequency noise on the power line; otherwise, you are only fixing half the problem.
A large electrolytic capacitor, usually between the value range of 10µF–100µF, will act as a reservoir for the power charge for the low-frequency noise. This capacitor is often placed on the power supply output to ensure that you do not introduce unwanted noise into the rest of the PCB.
The high-frequency noise is a little bit more challenging to control. Firstly, the capacitors used are the low inductance decoupling type and should be a value between (0.01µF –0.1µF). The common practice is to place a capacitor on each power pin of the IC. And it is better to be over-cautious with their usage. It’s better to err on the side of caution and make sure that you are not "straining" your bypass capacitors because you didn't use them correctly. That becomes much more important with larger ICs such as BGA and FPGA that might have multiple power inputs. Keep in mind that these capacitors' purpose is to short the high frequency’s noise away from the IC and ultimately to the ground.
Bypass Capacitor Basics
Before we jump too far down the rabbit hole, it's essential to understand some basic principles with capacitance.
First, we must understand capacitor resonance frequency, meaning resonance implies a canceling in your circuit. For capacitance resonance frequency, the frequency of capacitive reactance and inductive reactance cancel out each other. That would be the optimal point the bypass capacitor works best.
Figure 1: Capacitor resonant frequency.
We can see all this clearly in the formula for capacitor resonance frequency and Inductance and capacitance relationship. (See Figure 2.) Any change in the value of inductance, mostly unwanted inductance introduced to the circuit, will affect the optimal operating frequency. In basic terms, it is unbalancing the circuit.
Figure 2: Resonant frequency formula.
Placement and Routing
Just as important, the type and value of your bypass capacitors is the actual placement on your PCB. As we have now seen, the real enemy of effective decoupling of high frequency noise is inductance, including the inherent inductance in the traces themselves. As the trace length increases, generally, the inductance also increases, causing some significant problems with the resonant frequency.
As the butterfly flaps its wings a little harder, issues arise with bandwidth and the capacitors’ overall efficiency. If you continue down that logical path, the bypass capacitor will fail. It will no longer protect your ICs, especially when you factor in environmental operating conditions with temperature and humidity changes.
Figure 3: Bypass capacitor placement.
With that in mind, you should place the bypass capacitor as close to the power pin as possible (See Figure 3.) A great tool in knowing how close you safely can use the component placement courtyard placed on a mechanical layer of your footprint. Since your placement directly impacts your routing, correct placement will keep your routes as short as possible.
Your routing on both sides of the component, which we will refer to as the source and return sides, should be immediately tied with vias directly down to their appropriate power and ground planes.
Figure 4: Bypass capacitor routing.
That brings up an interesting point if you're using integrated circuits, which requires bypass capacitors, then should you use a layer stackup of only two layers? Remember, with a change in trace length either on the source or return sides of your capacitor will cause problems with the capacitor resonance frequency, introducing unwanted noise and instability into your design. It no longer becomes a question of if or can you route an integrated circuit board with only two layers.
Most likely, you can. The real problem is, should you? With the routing of signal, power, and grounds, all placed on two layers, the noise and parasitic inductance throughout the board is catastrophic. It is worth the minimal cost savings you'll see on having a two-layer board over a four-layer if the PCB doesn't work correctly?
As mentioned before, PCB designers operate under the rule of cause and effect; unfortunately, when things go wrong, they also operate under the rule of the "what-ifs." What if Second Officer David Blair returned the brass key in his pocket? The watchmen on that fateful night would have had access to the crow's nest and the badly needed binoculars that would have warned everyone earlier of the pending danger.
PCB designers shouldn't operate in the “what-ifs.” What if I didn't push everything into a two-layer stack up to save a little bit in fabrication, or placed the bypass capacitors far away from the power pins, or routed them wrong, causing issues? Follow some basic rules, and you too can safely navigate the North Atlantic Ocean and bypass the awaiting icebergs in your way.
John Watson, CID, is a customer success manager at Altium.