Distributed Solar PV Industry Hinges on Electricity Rate Design
July 20, 2015 | Lawrence Berkeley National LaboratoryEstimated reading time: 2 minutes
Future distributed solar photovoltaic (PV) deployment levels are highly sensitive to retail electricity rate design, according to a newly released report by researchers from the U.S. Department of Energy’s Lawrence Berkeley National Laboratory (Berkeley Lab). The study also explores the feedback effects between retail electricity rates and PV deployment, and suggests that increased solar deployment can lead to changes in PV compensation levels that either accelerate or dampen further deployment.
“We find that retail rate design can have a dramatic impact on PV deployment levels,” says report author Naïm Darghouth, a researcher in Berkeley Lab’s Energy Technologies Area. “For example, rate design changes currently being considered by a number of utilities, and modeled in our study, can dramatically erode aggregate customer adoption of PV (from -14% to -61%, depending on the design).”
The report, which uses a solar deployment model originally developed at the National Renewable Energy Laboratory, also examines PV deployment levels under broad adoption of time-of-use rates, purely volumetric rates, feed-in tariffs, and avoided cost-based rates. Most of these scenarios lead to deployment levels lower than under a continuation of net metering and current rate designs.
The report also considers two potential feedback effects between solar deployment and retail electricity rates. The first, commonly-noted feedback occurs if increased solar deployment leads to under-recovery of utility fixed costs, creating a need to increase retail electricity prices, thereby accelerating solar deployment. A second, less-frequently discussed—and opposing—feedback occurs when increased solar deployment causes a shift in the timing of peak electricity pricing, which tends to dampen solar adoption by customers on time-of-use rates.
“Our study shows that—at least on a national basis—these two feedback effects largely counteract one another. As such, current discussions that focus largely on the fixed-cost recovery feedback miss an important and opposing feedback mechanism that can in many circumstances moderate the issue of concern,” notes Berkeley Lab’s Ryan Wiser, a co-author on the report.
Exemplifying these feedbacks are the deployment impacts from switching all customers to time-varying rates. In the shorter term, up to about 2030, the study finds that PV deployment is greater than in the reference scenario – a result of the higher average compensation for PV under time-varying rates which boosts PV deployment. However, as regional PV levels increase and the energy and capacity value of PV drops, the compensation for net-metered PV generation under time-varying rates also falls, which leads to lower PV deployment levels. Therefore, proposals to move towards time-varying rates may boost PV deployment in the shorter term, but may actually reduce PV deployment in the longer term.
The report was motivated by the fact that rapid growth of net-metered solar PV has provoked concerns about the financial impacts of that growth on utilities and ratepayers. To address these concerns, an increasing number of states are exploring changes to net metering rules, retail rate structures, or both. According to report co-author Galen Barbose, “Understanding the deployment impacts of potential reforms to rate design and net metering will be critical for regulators and other decision makers as they consider changes to retail rates, given the continued role of PV in advancing energy and environmental policy objectives and customer choice. This report makes a unique contribution by quantitatively assessing these possible deployment impacts.”
The report, Net Metering and Market Feedback Loops: Exploring the Impact of Retail Rate Design on Distributed PV Deployment, may be downloaded at http://emp.lbl.gov/reports/re, along with a factsheet and summary slide deck.
Suggested Items
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.
Ansys, TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems
04/25/2024 | PRNewswireAnsys announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.
Siemens’ Breakthrough Veloce CS Transforms Emulation and Prototyping with Three Novel Products
04/24/2024 | Siemens Digital Industries SoftwareSiemens Digital Industries Software launched the Veloce™ CS hardware-assisted verification and validation system. In a first for the EDA (Electronic Design Automation) industry, Veloce CS incorporates hardware emulation, enterprise prototyping and software prototyping and is built on two highly advanced integrated circuits (ICs) – Siemens’ new, purpose-built Crystal accelerator chip for emulation and the AMD Versal™ Premium VP1902 FPGA adaptive SoC (System-on-a-chip) for enterprise and software prototyping.
Listen Up! The Intricacies of PCB Drilling Detailed in New Podcast Episode
04/25/2024 | I-Connect007In episode 5 of the podcast series, On the Line With: Designing for Reality, Nolan Johnson and Matt Stevenson continue down the manufacturing process, this time focusing on the post-lamination drilling process for PCBs. Matt and Nolan delve into the intricacies of the PCB drilling process, highlighting the importance of hole quality, drill parameters, and design optimization to ensure smooth manufacturing. The conversation covers topics such as drill bit sizes, aspect ratios, vias, challenges in drilling, and ways to enhance efficiency in the drilling department.