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How do you intuitively engineer good impedance controlled PCB stack-up and routing plans for each new design which meet all of their specific impedance control design requirements?
- Search on the Internet?
- Do hand calculations?
- Ask a friend?
- Always force the design into the same one or two because they worked in the past?
- Buy a very expensive and complex tool like Polar?
- “Feel” the best solution?
- Hire an “expert” to do it?
Can you intuitively visualize and understand what it’s doing and how to reliably use it?
How do you efficiently approach gathering the raw data to make the final choices?
This webinar, presented by Nine Dot Connects on August 31, will answer these questions, and many more.
As signal speeds increase the shortcomings of materials (like FR-4) become critical. Dielectric constants aren’t constant resulting in dispersion. Loss increases and is frequency dependent resulting in signal degradation over longer runs. Gathering information on lots of materials, tabulating all the information at various frequencies along with the specific thicknesses available, selecting optimal materials and adjusting stack-ups to compensate can be very time consuming and error-prone.
In this webinar, Nine Dot Connects’ Sr. Principle EE Jeff Condit will show you intuitively how various elements of a PCB’s structure and routing affect the electromagnetic fields and in turn the couplings, energies, and characteristic impedances of traces on it. Practical suggestions, methods, alternatives and solutions will be discussed.
Wednesday, August 31, 2016 at 11 am (PDT) / 2 pm (EDT)
For more information, or to register, click here.
Andy Shaughnessy, Design007 Magazine
We’re in the middle of show season, and it certainly “shows.” Thank you very much. I’m here all week. Don’t forget to tip your wait staff. This week, we published a variety of articles, columns, and news items, and much of it centered on trade shows. Technical Editor Dan Feinberg brings us a report from CES 2023. IPC announced the winners of the Best Technical Paper awards for IPC APEX EXPO 2023. And we have an interview with Altium’s Rea Callender about the company’s educational efforts at APEX and around the globe.
I-Connect007 Editorial Team
Altium keeps its eyes on the designers of the future. The company has been working with colleges and universities for years, providing free seats of Altium Designer for the next generation of PCB designers and design engineers. At IPC APEX EXPO 2023, Altium will be providing software for the finalists in the IPC Design Competition just as it did last year. They offer a variety of other educational programs as well, including Upverter classes and a design competition that aims to address environmental change. Here, Rea Callender, Altium’s VP of education, discusses its educational programs and plans for the week of the show.
Patrick Crawford, IPC
Last year, IPC held its first-ever design competition at IPC APEX EXPO in San Diego. PCB designers from around the world competed in a series of heats during the months before the show, culminating in a showdown on the show floor between the top three finalists. Rafal Przeslawski, now with AMD, took home the top prize last year. This year, the competition is back for its sophomore year. I asked Patrick Crawford, manager of design standards and related programs for IPC, to “layout” the details on the design contest, including lessons learned in 2022 and what’s new for the 2023 competition.